CONFERENCE PAPERS

  1. Yasin Khan, Pritam Khan, Sudhir Kumar, Jawar Singh and Rajesh Hegde "Blockchain-based Interoperable Healthcare Using Zero-knowledge Proofs and Proxy Re-Encryption" 17th IEEE India Council International Conference (INDICON), IEEE, New Delhi, India, 2020/12, INDIA
  2. Bhavye Sharma, Raju Halder, and Jawar Singh "Blockchain-based Interoperable Healthcare Using Zero-knowledge Proofs and Proxy Re-Encryption" IEEE International Conference on COMmunication Systems & NETworkS (COMSNETS), 2020, INDIA
  3. Sandeepkumar Pandey, Jawar Singh, and Pramod K. Tiwari "Energy and Area Aware Digital Fingerprint Generator Using Intrinsic Randomness" 25th IEEE international conference on noise and fluctuations, June 2019, Neuchâtel (Switzerland)
  4. Deb Deep, Jawar Singh, and Jimson Mathew "Hardware-Software Co-design Approach for Deep Learning Inference" 7th International Conference on Smart Computing & Communications, June 2019, Malaysia
  5. Nawaz Shafi, Chitrakant Sahu, C Periasamy, and Jawar Singh "SiGe Source Charge Plasma TFET for Biosensing Applications" 2017 IEEE International Symposium on Nanoelectronic and Information Systems, pp 93-98, 18/12/2017, Bhopal, INDIA
  6. Venkata P Yanambaka, Saraju P Mohanty, Elias Kougianos, Prabha Sundaravadivel and Jawar Singh "Reconfigurable Robust Hybrid Oscillator Arbiter PUF for IoT Security Based on DL-FET" 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp 665-670, 3/7/2017, Bochum, Germany
  7. Venkata P Yanambaka, Saraju P Mohanty, Elias Kougianos, Prabha Sundaravadivel and Jawar Singh "Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function" 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp 609-614, 3/7/2017, Bochum, Germany
  8. Venkata P Yanambaka, Saraju P Mohanty, Elias Kougianos and Jawar Singh "Secure Multi-key Generation Using Ring Oscillator Based Physical Unclonable Function" 2016 IEEE International Symposium on Nanoelectronic and Information Systems, pp 200-205, 19/12/2016, Gwalior, INDIA
  9. Meena Panchore, Jawar Singh, Saraju P Mohanty, and Elias Kougianos "Compact Behavioral Modeling and Time Dependent Performance Degradation Analysis of Junction and Doping Free Transistors"
    2016 IEEE International Symposium on Nanoelectronic and Information Systems, pp 194-199, 19/12/2016, Gwalior, INDIA
  10. Chaitanya Maradana and Jawar Singh "Proposal of Heterogate Technique for Performance Enhancement of DM-TFET" 2016 IEEE International Symposium on Nanoelectronic and Information Systems, pp 118-123,19/12/2016, Gwalior, INDIA
  11. Muhammad Khalid and Jawar Singh "Memristor Crossbar-Based Pattern Recognition Circuit Using Perceptron Learning Rule" 2016 IEEE International Symposium on Nanoelectronic and Information Systems, pp 236-239, 19/12/2016, Gwalior, INDIA
  12. Kanchan Cecil and Jawar Singh "Performance Enhancement of Dopingless Tunnel-FET Based on Ge-Source with High-k" 2015 IEEE International Symposium on Nanoelectronic and Information Systems, pp 19-22, Indore, INDIA
  13. Lokesh Kumar Bramhane and Jawar Singh "Extended Base Schottky-Collector Bipolar Charge Plasma Transistor" 2015 IEEE International Symposium on Nanoelectronic and Information Systems, pp 137-140, Indore, INDIA
  14. Saurabh Bhaskar and Jawar Singh "Process variation immune dopingless dynamically reconfigurable FET Electron Devices and Solid-State Circuits (EDSSC)", 2015 IEEE International Conference on, pp 257-260, Singapore
  15. Anup Kumar, Chitrakant Sahu and Jawar Singh "Subthreshold Analog/RF performance estimation of doping-less DGFET for ULP applications Emerging Electronics (ICEE)", 2014 IEEE 2nd International Conference on, pp 1-4, IISC Bangalore, INDIA, 2014/12/3
  16. Rajesh Singh Lodhi, Som Dutt Pandey, Chitrakant Sahu and Jawar Singh "Performance comparison of bulk and SOI planar junctionless SONOS memory Emerging Electronics (ICEE)", 2014 IEEE 2nd International Conference on, pp 1-4, IISC Bangalore, INDIA, 2014/12/3
  17. Deep Kishore Parsediya Jawar Singh and Pavan Kumar Kankar "Modeling and simulation of variable thickness based stepped MEMS cantilever designs for biosensing and pull-in voltage optimization"
    2014 VLSI Design and Test, 18th International Symposium on (VDAT), INDIA, 2014/7/16
  18. Sachin Agrawal, Sunil Kumar Pandey, Jawar Singh and Manoj S Parihar "Realization of efficient RF energy harvesting circuits employing different matching technique" 2014 IEEE Fifteenth International Symposium on Quality Electronic Design (ISQED), pp 754-761 CA, USA, 2014/3/3
  19. Anup Shrivastava and Jawar Singh "Dual-sided doped memristor and it's SPICE modelling for improved electrical properties" 2014 IEEE Fifteenth International Symposium on Quality Electronic Design (ISQED), pp 317-322, CA, USA, 2014/3/3
  20. Komal Singh, Chitrakant Sahu and Jawar Singh "Linearly separable pattern classification using memristive crossbar circuits" 2014 IEEE Fifteenth International Symposium on Quality Electronic Design (ISQED), pp 323-329, CA, USA, 2014/3/3
  21. Anup Shrivastava and Jawar Singh "Dual sided doped memristor and it's mathematical modelling Electronics, Circuits, and Systems (ICECS)", 2013 IEEE 20th International Conference on, pp 49-51, Abu Dhabi, 2013/12/8
  22. Pankaj Kumar, Chitrakant Sahu, Anup Shrivastava, Jawar Singh, and P.N. Kondekar "Characteristics of gate inside junctionless transistor with channel length and doping concentration Electron Devices and Solid-State Circuits (EDSSC)", 2013 IEEE International Conference of, pp 1-2, Hong Kong, 2013/6/3
  23. Chitrakant Sahu, Jawar Singh, and P.N. Kondekar "Investigation of ultra-thin BOX junctionless transistor at channel length of 20 nm Electron Devices and Solid-State Circuits (EDSSC)", 2013 IEEE International Conference of, pp 1-2, Hong Kong, 2013/6/3
  24. Sachin Agrawal, Sunil Pandey, Jawar Singh, and P.N. Kondekar "An Efficient RF Energy Harvester with Tuned Matching Circuit" 2013 VLSI Design and Test, pp 138-145, INDIA, 2013/1/1
  25. GK Reddy, Kapil Jainwal, Jawar Singh, and Saraju P Mohanty "Process variation tolerant 9T SRAM bitcell design" 2012 IEEE Thirteenth International Symposium on Quality Electronic Design (ISQED), pp 493-497, CA, USA, 2012/3/19
  26. Jawar Singh, Dilip S Aswar, Saraju P Mohanty, Dhiraj K Pradhan "A 2-port 6T SRAM bitcell design with multi-port capabilities at reduced area overhead" 2010 IEEE Eleventh International Symposium on Quality Electronic Design (ISQED), pp 131-138, CA, USA, 2010/3/22
  27. A Ricketts, Jawar Singh, K Ramakrishnan, N Vijaykrishnan, D K Pradhan "Investigating the impact of NBTI on different power saving cache strategie" 2010 ACM-IEEE Design, Automation & Test in Europe Conference & Exhibition (DATE), pp 592-597, Germany, 2010/3/8
  28. Jawar Singh, Krishnan Ramakrishnan, S Mookerjea, Suman Datta, Narayanan Vijaykrishnan, D Pradhan "A novel si-tunnel FET based SRAM design for ultra low-power 0.3 VV DD applications" 2010 ACM-IEEE Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), pp 181-186, 2010/1/18
  29. S Mookerjea, D Mohata, R Krishnan, Jawar Singh, A Vallett, A Ali, T Mayer, V Narayanan, D Schlom, A Liu, S Datta "Experimental demonstration of 100nm channel length In 0.53 Ga 0.47 As-based vertical inter-band tunnel field effect transistors (TFETs) for ultra low-power logic and SRAM applications" 2009 IEEE International Electron Devices Meeting (IEDM), pp 1-3, 2009/12/7
  30. Jawar Singh, Dhiraj K Pradhan, Simon Hollis, Saraju P Mohanty, J Mathew "Single ended 6T SRAM with isolated read-port for low-power embedded systems" 2009 ACM-IEEE Design, Automation & Test in Europe Conference & Exhibition (DATE), pp 917-922, Germany, 2009/4/20
  31. Jawar Singh, Jimson Mathew, Saraju P Mohanty, Dhiraj K Pradhan "Single ended static random access memory for low-vdd, high-speed embedded systems" 2009 22nd International Conference on VLSI Design (VLSID), pp 307-312, INDIA, 2009/1/5
  32. Yi Xin Su, Jimson Mathew, Jawar Singh and Dhiraj K Pradhan "Pseudo parallel architecture for AES with error correction" 2008 21st IEEE International SOC Conference (SOCC), pp 187-190, CA, USA, 2008/9/17
  33. Jawar Singh Jimson Mathew, Dhiraj K Pradhan, Saraju P Mohanty "Failure analysis for ultra low power nano-CMOS SRAM under process variations" 2008 21st IEEE International SOC Conference (SOCC), pp 187-190, CA, USA, 2008/9/17
  34. Jawar Singh Jimson Mathew, Dhiraj K Pradhan, Saraju P Mohanty "A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies" 2008 21st IEEE International SOC Conference (SOCC), pp 243-246, CA, USA, 2008/9/17
  35. Jimson Mathew, Jawar Singh, Anas Abu Taleb Dhiraj K Pradhan "Fault tolerant reversible finite field arithmetic circuits" 2008 14th IEEE International On-Line Testing Symposium (IOLTS), pp 188-189, Rhodes, Greece, 2008/7/7
  36. Jawar Singh, Jimson Mathew, Dhiraj K Pradhan, Saraju P Mohanty "A nano-CMOS process variation induced read failure tolerant SRAM cell" 2008 IEEE International Symposium on Circuits and Systems (ISCAS), pp 3334-3337,Seattle, USA, 2008/5/18
  37. Jimson Mathew, Jawar Singh, Abusaleh M Jabir, Mohammad Hosseinabady, Dhiraj K Pradhan "Fault tolerant bit parallel finite field multipliers using LDPC codes" 2008 IEEE International Symposium on Circuits and Systems (ISCAS), pp 1684-1687,Seattle, USA, 2008/5/18
  38. Babita R Jose, P Mythili, Jawar Singh, Jimson Mathew "A Triple-Mode Sigma-Delta Modulator Design for Wireless Standards" 2007 IEEE 10th International Conference on Information Technology,(ICIT 2007), pp 127-132,INDIA, 2007/12/17
  39. Jawar Singh, J Mathew, M Hosseinabady, DK Pradhan "Single event upset detection and correction" 2007 IEEE 10th International Conference on Information Technology,(ICIT 2007), pp 127-132,INDIA, 2007/12/17
  40. Jawar Singh, Jimson Mathew, Saraju P Mohanty, Dhiraj K Pradhan "Statistical analysis of steady state leakage currents in nano-CMOS devices" 2007 Norchip, 2007, pp 1-4, Denmark, 2007/11/19