Jawar Singh, Professor
Department of electrical Engineering Indian Institute of Technology Patna E-mail: dr.jawar[at]gmail.com, jawar[at]iitp.ac.in
Latest News
Patents
- Dhiraj K. Pradhan, Jawar Singh and Jimson Mathew, "Static Random Access Memory", US Patent No. 7706174; issued April 27, 2010.
- Jawar Singh Ramakrishnan Krishnan, Saurabh Mookerjea, Suman Datta, and Vijay Krishnan Narayan, "TFET based 6T SRAM cell", U.S. Patent No. 8,369,134, Feb 3, 2013.
- Jawar Singh and Anup Shrivastav, "Resistive Switching Device: Memristor", Indian Patent Application No. 431/MUM/2015, Feb 2015.
- Pandey Sandeepkumar, Zalke Jitendra and Jawar Singh, "A method and system for providing the identification, authentification and security using unique thermal profile signature map (UTPSM)", Indian Patent Application No. 201721046615, Dec 2017.
BOOK AND BOOK CHAPTERS
- Jawar Singh and Chitrakant Sahu, "Nano-CMOS and Post-CMOS Electronics: Devices and Modelling, [Junction and Doping Free Transistors For Future Computing]", IET UK, ISBN 978-1-84919-997-1, 2015.
- Jawar Singh and Balwinder Raj, "Embedded System / Book 1 Chapter Title [SRAM Cells for Embedded Systems]", INTECH Open Access Publisher, ISBN 979-953-307-580-7, 2014.
- Jawar Singh, S. Mohanty and Dhiraj K. Pradhan, "Robust and Power-Aware SRAM Bitcell Design and Analysis", Springer-Verlag New York Inc., Hardcover, ISBN 978-1-4614-0817-8, 2013.
AWARDS AND FELLOWSHIP
- 2020 Elevated as Fellow IE (India)
- 2020 Elevated as Fellow IETE
- 2016 BHAVAN (Indo-US) Fellowship for six months at the University of North Texas, Denton, USA
- 2015 Best Paper Award, IEEE International Symposium on Nanoelectronic and Information Systems, INDIA
- 2014 Travel grant from SERB (Department of Science and Technology, Govt. of INDIA) for attending an International conference in Santa Clara, CA, USA
- 2014 Elevated to Senior Member IEEE (92189326), IEEE USA
- 2012 Inventor Incentive Award, the Pennsylvania State University, USA
- 2009 Worldwide University Network Fellowship, Government of UK
- 2005 National Overseas Fellowship, Government of INDIA
- 1999 GATE Scholarship
FUNDING AND RESEARCH PROJECTS
- Department Science and Technology, Govt. of Bihar, "Establishing Center of Excellences in Government Polytechnic Colleges", 67 Crore (PI, 2022 - 2027).
- Science and Engineering Research Board (SERB) DST Govt. of India, "Design and Development of Silicon Artificial Neuron and Synapse for Brain Inspired Computing", 45,00,000 (PI, 2022 - 2025).
- National Mission on Interdisciplinary Cyber Physical Systems, SERB, DST Govt. of India, "Technology Innovation Hub-IIT Patna", 110 Crore (Co-PI, 2019 - 2024).
- Science and Engineering Research Board (SERB) DST Govt. of India, "Exploration of 8/9 nano-meter process variation immune doping- and junction-free devices and their circuits", 35,00,000 (PI, 2017 - 2019).
- Science and Engineering Research Board (SERB) DST Govt. of India, "Design and Development of RF Energy Harvesting Circuits for Low-power Electronic Devices ", 55,00,000 (PI, 2015 - 2018).
- Ministry Of Electronics & Information Technology (SMDP), Govt. of INDIA, "Power manage- ment module- Wireless Sensor Network node for IoT", 67,00,000 (Co-PI, 2015 - 2019).
- Ministry Of Electronics & Information Technology (SMDP), Govt. of INDIA, "Low power processor based power management unit for Internet of Things (loT) applications", 16,95,000 (Co-PI, 2015 - 2019).
- Indian Nano-electronic User Program (INUP), IIT Bombay, "Characterization of Tunnel - FETs for low power Static RAM bitcells", 12,00,000 (PI, 2010 - 2012).
- All India Council for Technical Education, Govt. of INDIA, "Computer Aided Analysis and Diagnosis of Hansen Disease", 11,00,000 (Co-PI, 2004 - 2006).
PEER-REVIEWED JOURNAL PAPERS [Google Scholar Statistics]
- Tripty Kumari, Pramod Kumar Tiwari, Jawar Singh, Kuei-Shu Chang-Liao, "Subthreshold Modeling of GAA MOSFET Including the E ect of Process-Induced Inclined Sidewalls", IEEE Transactions on Electron Devices, vol.68, Dec 2021 (IF 2.93).
- Alok Kamal and Jawar Singh, "Fully Planar Impact Ionization -RAM Cell with High- Performance and Non-Destructive Read-out", IEEE Transactions on Electron Devices, vol.68, Sept 2021 (IF 2.93).
- Alok Kumar, Neha Kamal and Jawar Singh, "A low power L-shaped gate bipolar impact ionization MOSFET based capacitorless one transistor dynamic random access memory cell", IoP Science, Japanese Journal of Applied Physics, vol.60, May 2021 (IF 1.48).
- Neha Kamal, Alok Kamal and Jawar Singh, "L-Shaped Tunnel Field E ect Transistor Based 1T DRAM with Improved Read Current Ratio, Retention Time and Sense Margin", IEEE Transactions on Electron Devices, vol.68, June 2021 (IF 2.93).
- Kanchan Cecil, Jawar Singh, and Dip Prakash Samajdar, "Channel-hot-carrier degradation in the channel of junctionless transistors: a device- and circuit-level perspective", Silicon (2021). Panchore Meena, Bramhane Lokesh, and Jawar Singh, "Channel-hot-carrier degradation in the channel of junctionless transistors: a device- and circuit-level perspective", Journal of Computational Electronics, Springer Nature, 20, pp 1196{1201 (2021) (IF 1.53).
- Neha Kamal and Jawar Singh, "A Highly Scalable Junctionless FET Leaky Integrate-and- re Neuron for Spiking Neural Networks", IEEE Transactions on Electron Devices, vol.68, April 2021 (IF 2.93).
- Tripty Kumari, Jawar Singh, and Pramod Kumar Tiwari, "Investigation of Ring-TFET for Better Electrostatics Control and Suppressed Ambipolarity", IEEE Transactions on Nanotechnology, vol.19, pp 829 - 836, 2020.
- Meena Panchore, Kanchan Cecil, and Jawar Singh, "Impact of Temporal Variability on Dopingless and Junctionless FET based SRAM Cells", Springer Silicon, 2020.
- Alok Kumar Kamal, and Jawar Singh, "Simulation based Ultra-Low Energy and High Speed LIF Neuron using Silicon Bipolar Impact Ionization MOSFET for Spiking Neural Networks", IEEE Transactions on Electron Devices, vol.67, June 2020 (IF 2.93).
- Md. Hasan Raza Ansari, and Jawar Singh, "Capacitorless 2T-DRAM for Higher Retention Time and Sense Margin", IEEE Transactions on Electron Devices, vol.67, no.3, pp 6, 2020 (IF 2.93).